Graphene Nanoribbon FETs for Multi-Valued Logic: Literature Insights and a Compact Ternary Multiplier Design

Niriksha, B and Anushree, S and C J, Siri and Akshata, Rayannavar (2025) Graphene Nanoribbon FETs for Multi-Valued Logic: Literature Insights and a Compact Ternary Multiplier Design. International Journal of Trend in Scientific Research and Development, 9 (2). pp. 1354-1358. ISSN 2456-6470

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Abstract

As the limitations of silicon-based CMOS technologies become increasingly pronounced at sub-7 nm nodes, alternative transistor architectures and logic paradigms are gaining traction. Among these, graphene nanoribbon field-effect transistors (GNRFETs) offer promising prospects for implementing multi-valued logic systems, particularly ternary logic, due to their exceptional electrical, thermal, and scaling characteristics. This literature survey investigates the state-of-the-art in GNRFET research with a specific focus on their application in ternary logic circuits. Key developments in GNRFET-based gate design, digital building blocks, and simulation methodologies are reviewed, alongside their performance advantages in terms of power, delay, and scalability over conventional MOSFETs. As a case study, a novel 26-transistor 1-trit ternary multiplier architecture is introduced, demonstrating the potential of GNRFETs in compact, high-efficiency ternary computing systems. The review consolidates existing knowledge while highlighting future research directions for integrating GNRFET-based ternary logic into ultra-low-power VLSI design.

Item Type:	Article
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions:	Postgraduate > Master's of Islamic Education
Depositing User:	Journal Editor
Date Deposited:	13 May 2025 12:46
Last Modified:	13 May 2025 12:46
URI:	http://eprints.umsida.ac.id/id/eprint/16047

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